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NXP Semiconductors /MIMXRT1011 /DCP /PAGETABLE

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Interpret as PAGETABLE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (FLUSH)FLUSH 0BASE

Description

DCP page table register

Fields

ENABLE

Page table enable control
FLUSH

Page table flush control. To flush the TLB, write this bit to 1 and then back to 0.
BASE

Page table base address

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data